1. Field of the Invention
The present invention relates to a microcomputer, and particularly relates to a microcomputer having a product-sum operation instruction which repeats multiplication and addition for a predetermined number of times.
2. Description of the Prior Art
Referring to FIG. 6, the method to execute a product-sum operation instruction in a conventional microcomputer will be described below. To simplify the description, it is supposed here that the data needed for operations including multipliers and multiplicands are read from a register group 401 comprising a plurality of registers. The subject register address is supposed to be given to a register address bus 402. The multiplication is made according to the secondary Booth algorithm and the data have 16 bits.
Firstly, a multiplier data is read from the register group 401 and sent to a temporary register 403. The multiplier data read to the temporary register 403 is decoded by a Booth decoder 404. A multiplicand data read from the register group 401 is modified by the decoded value and written to a temporary register 405.
In the multiplication of 16-bit data using the secondary Booth algorithm, eight partial products are determined so that they are added with a shift of two bits for each.
According to the secondary Booth algorithm, a 16-bit multiplier data (Y) is expressed as follows: EQU Y=.SIGMA.(-2Y.sub.2j+1 +Y.sub.2j +Y.sub.2j-1)
Decoding of a multiplier data by the Booth decoder 404 is to determine (-2y.sub.2j+1 +y.sub.2j +y.sub.2j +y.sub.2j-1) in the above expression. The result will become either 0, .+-.1 or .+-.2. Modification of a multiplicand data (X) by the above decoded value is to determine either 0, .+-.X or .+-.2X depending on the result of decoding. Eight partial products are the values 0, .+-.X or .+-.2X, as a result of modification by the decoded value.
The first partial product is written to a temporary register 407. For the remaining partial product, the multiplicand data is similarly modified by the value at the Booth decoder 404 and repeatedly shifted for 2 bits by a shift register 406. The contents of the shift register 406 and the temporary register 407 are added at an ALU 408. The result obtained from the addition at the ALU 408 is written to the temporary register 407.
Thus, the multiplicand data is modified by the value at the Booth decoder 404 and repeatedly shifted and added so that the multiplication result is determined. The multiplication result is, via an internal data bus 105, written to the register group 401.
After the next set of multiplier and multiplicands is similarly processed to determine the next multiplication result, the previous multiplication result is read from the register group 401 via a data bus 409.
At the same time, the current multiplication result written to the temporary register 407 is read via another data bus 410 and input to the ALU 408 for addition processing.
By repeating the above processing for a predetermined number of times, a product-sum operation instruction is executed. The final product-sum operation result is temporarily held at a register 420 and written to the register group 401 via the internal data bus.
As described above, in a conventional microcomputer, a product-sum operation is executed by microprogram control where the multiplicand data is processed to determine partial products, which are repeatedly shifted for 2 bits and added for multiplication. With the result being temporarily held, the next multiplication is made. After the determination of the next multiplication result, the previous multiplication result is read out again for addition. Such a procedure prolongs the execution time of a product-sum operation.
For microcomputers, a higher speed product-sum operation is strongly desired. With the conventional microprogram control method, however, it is difficult to improve the speed remarkably.